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As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art — from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.
Intel Careers Opportunities for Graduate Fresher, Entry Level in various domain such as Technology, Engineering, finance, Operation, Customer services, Legal, HR, Business Operation and many more
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world’s largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 series of instruction sets, the instruction sets found in most personal computers
Intel Careers for Graduates In 2025
Burn-in Product Development Engineer – US
Job responsibilities include developing the burn-in/stress test program for products in the server team’s roadmap, and exhaustively validating the effectiveness of stress application prior to deploying it for product qualification and/or high volume manufacturing.
Job Responsibilities:
– Ensuring optimal stress application for products to meet their reliability goals- Develop a component-level stress plan that takes into account design for burn-in considerations, product use conditions and requirements of infant mortality screening-
Evaluation, development, validation and debug of stress patterns for complex circuits and IP blocks
Analyze and evaluate component specification versus stress needs and ensure optimal match of component requirements with stress equipment capability
Drive continual improvement in coverage, or content enhancement through the lifecycle of development-
Drive validation on new HBI stress platform to ensure seamless product qualification execution and HVM deployment of burn-in content
Model based structured problem solving to resolve issues that arise either during stress implementation, or during validation/deployment to high volume manufacturing
Independently collaborating and communicating with manufacturing validation engineering, product QnR, TD QnR, STTD and ATM teams to accomplish project goals
Qualifications:
The candidate must have a Bachelor’s degree in Electrical/Computer engineering or other related fields of study and 1+ years of experience in the following:- Debug and data analysis skills using tools like JMP
Preferred Qualifications:
Master’s degree in Electrical/Computer engineering or other related fields of study and 1+ years of experience in:
Debug and data analysis skills using tools like JMP- Semiconductor device physics, logic design, design for test, computer architecture, digital/analog circuits- Hands-on work, specifically implementing test programs or using tester platforms to perform content debug and validation-
Programming in one/more language: C/C++, Perl, Python, Java, VB, etc.- High volume manufacturing flows and automation
For more details to apply, Click here!
Physical Design Engineer For CPU Core IP
Job Responsibilities:
Synthesis and Place and Route using industry standard tools for high-speed CPU core design.
Perform all aspects of design flow from logic synthesis, place and route, FEV, power, timing, quality checks, and design closure.
Develop strategies to deliver reproducible design convergence results.
Help to create and refine synthesis flow for the project team.
Develop and recommend better design method practices to enable better synthesis convergence.
The ideal candidate will exhibit behavioral traits that demonstrate: Willingness to work with others in a highly complex decision space.
Skills at developing an implementation plan monitoring key indicators and communicating resource needs and scoping risk to deliver value on schedule.
Excellent verbal and written communication and collaboration skills.
Qualifications:
Bachelors in Computer Engineering or Electrical Engineering or related technical field with 1+ years of relevant work experience or M.S. in Computer Engineering or Electrical Engineering or related technical field.
Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure.
Experience in PV convergence (including static timing and power analysis).
Chip physical design verification including formal equivalence, timing, electrical rules, DRC/LVS, Noise and electro-migration checks.
Experience in scripting an interpreted language, minimum TCL in addition to at least one other (e.g. Perl, Python, Ruby).
Demonstrated success in one or more of the following areas: Synthesis of a digital logic block, which was integrated into a large SoC or IP.
Preferred Qualifications
Industry experience/exposure with CPU Micro-Architecture
Knowledge with Physical design best known practices concerning floor-planning, routing techniques, clock distribution
Knowledge of Static Timing Analysis, Noise analysis, and reliability verification techniques
Knowledge of RTL to GDS methodologies and formal equivalence
Knowledge with Synopsys tool suite (Fusion compiler, ICC2, PrimeTime) or Cadence (Genus/Innovus)
For more details to apply, Click here!
Quality and Reliability Engineer
Job Responsibilities:
Drives the development and execution of product qualification strategies and plans and adherence to release criteria.
Performs risk assessments, defines quality and reliability goals, and enables key decisions that affect product quality and reliability.
Augments or modifies existing release criteria for new designs and form factors as required.
Contributes to design, development, and validation of component, board, and/or systems and the development and implementation of manufacturing test processes.
Supports testability circuits, test flows, and methodologies for new products through evaluation, development, and debug of complex test methods.
Interfaces with process development, fab, factory, assembly, manufacturing groups, and outsource partners to ensure quality and reliability.
Analyzes and evaluates component and system specifications to ensure optimal match of components, system requirements, and test capabilities with specific emphasis on quality and reliability.
Qualifications:
Bachelor Degree in Electrical Engineering, Mechatronic or Computer Engineering.
Advanced English level.
Documented experience longer or equal than 6 months in python or C/C++ though courses or projects.
Preferred Qualifications:
Proficiency in Verilog/VHDL
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
For more details to apply, Click here!
TestChip Analog Engineer HVM/DV
Job Responsibilities:
Designs, develops, and builds analog circuits in advanced process nodes for analog and mixed-signal IPs.
Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models.
Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results.
Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals.
Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues.
Optimizes performance, power, area, and reduces leakage of circuits.
Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.
Qualifications:
Bachelor’s degree in Electronics, Electrical Engineering or equivalent studies.
1+ years of experience in an engineering position.
Intermediate to advanced English Level.
Must have permanent unrestricted right to work in Costa Rica.
Preferred qualifications:
2+ Years of experience in the following:
Semiconductors.
Test development and execution using lab equipment for analog, mixed signal circuit characterization and debug.
Background and knowledge in hardware architecture analog, mixed signal design and implementation.
For more details to apply, Click here!
Emulation Engineer – Fully Remote – India
Job Description:
Create emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning, and routing tools.
Define and document RTL changes required for emulation/FPGA.
Develop hardware and software collaterals and integrate them with the emulation/FPGA model.
Test and debug the emulation/FPGA model and collaterals.
Define and develop new capabilities and HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre silicon and post Silicon functional validation as well as SW development/validation.
Develop improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.
Interface with and provide guidance to pre silicon Validation teams for optimizing pre Silicon validation environments, test suites, and methodologies for emulation efficiency.
Develop and apply automation aids, flows, and scripts in support of emulation ease of use and improvement of equipment utilization.
Qualifications
B.Tech /M.Tech degree in Electrical Engineering, Electrical and communication Computer Science and:
Should have 2-10 yrs of experience
Experience in Verification planning
Experience in Verification testcase development
Experience in RTL code debug [Verilog preferred]
Experience in Post Silicon debug support
Programming skills: Python, C/C++, Perspec, Verilog
Good multi-tasking skills
Team-player, great communication skills
Preferred:
Experience in Pre-Si power and performance correlation.
Familiarity with System level emulation-based verification.
Familiarity with Synopsys tools
Familiarity with Post-Si Validation and debug support
Familiarity with Assembly, System Verilog
Programming exposure with virtual platforms
Familiarity of Intel CPU architecture or x86 architecture in general
Experience in emulation with Zebu or Haps, SLE environment