Boeing Recruitment 2021 for Fresher | Entry Level | STEM | Graduate or Post Graduate | 0 - 5 yrs | Bengaluru

Boeing Recruitment 2021 for Fresher | Entry Level | STEM | Graduate or Post Graduate | 0 – 5 yrs | Bengaluru

At Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We’re committed to fostering an environment for every teammate that’s welcoming, respectful and inclusive, with great opportunity for professional growth.

Boeing India Engineering seeks an Associate ASIC-FPGA Verification Engineer to support multiple product lines in commercial and defense electronics development.

Fresher’s with strong fundamentals upon System Verilog and UVM are eligible to apply.

Job Description:
Develop models in System Verilog to verify design implementation and develop and run scripts and Make-files.
Analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.
Performs testing and analysis activity to assure compliance to requirements.
Performs activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.
Coordinates engineering support throughout the lifecycle of the product.
Develop IP and Sub System modules for Test Bench integration under minimal guidance.

Basic Qualifications (Required Skills/Experience):
0 to 5 years of experience in Digital ASIC/FPGA verification.
Bachelor’s degree and 2 or more years’ experience in digital ASIC/FPGA verification (concurrent design experiences for two plus years, Master’s degree with equivalent experience in digital design(minimal)/verification, or PhD degree with equivalent of experience in digital design(minimal)/verification.
Experience in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.
In depth experience in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.

Preferred Qualifications (Desired Skills/Experience):
Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry

Typical Education & Experience:
Education/experience typically acquired through advanced education (e.g. Bachelor) and typically 0 to 5 years’ related work experience or an equivalent combination of education and experience ( Masters with 0 to 4 years of experience )

Apply Now