Boeing Requirements for Graduate Freshers | Analyst | Any Graduate or equivalent exp | 0 - 1 yrs | Apply Now

Boeing India is Hiring for Fresher | Entry Level | Associate Engineer | 0 – 5 yrs | Apply Now

At Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We’re committed to fostering an environment for every teammate that’s welcoming, respectful and inclusive, with great opportunity for professional growth.

Boeing India Engineering seeks an Associate Digital ASIC/FPGA Verification Engineer to support multiple product lines in commercial and defense electronics development.

ASSOCIATE ASIC-FPGA VERIFICATION ENGINEER

Job Responsibilities:

Develop models in System Verilog to verify design implementation and develop and run scripts and Make-files.
Analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.
Performs testing and analysis activity to assure compliance to requirements.
Performs activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.
Coordinates engineering support throughout the lifecycle of the product.
Develop IP and Sub System modules for Test Bench integration under minimal guidance.

Basic Qualifications:

Fresher’s with strong fundamentals upon System Verilog and UVM are eligible to apply.
2 or more year’s of experience in Digital ASIC/FPGA verification.
Bachelor’s degree and 2 or more years’ experience in digital ASIC/FPGA verification (concurrent design experiences for two plus years, Master’s degree with equivalent experience in digital design(minimal)/verification, or PhD degree with equivalent of experience in digital design(minimal)/verification.
Experience in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.
In depth experience in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.
Experience in using Universal Verification Methodology (UVM): Experience creating drivers, monitors, predictors, and scoreboards.
Experience working with self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.
Experience in verification working with internal/external VIPs, its development and evaluation with multiple vendors.
In depth understanding in System Verilog language and verification concepts.
Work experience using Linux or Unix terminal commands.
Experience using scripting languages: Make, Perl, Python, shell scripts, etc.
Experience using Revision Control Systems: Subversion (SVN), CVS, Git.
Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).
Experience in Avionics protocols is a plus.

Preferred Qualifications (Desired Skills/Experience):
Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry

Typical Education & Experience:
Education/experience typically acquired through advanced education (e.g. Bachelor) and typically 0 to 5 years’ related work experience or an equivalent combination of education and experience ( Masters with 0 to 4 years of experience )
This position does offer relocation within INDIA.

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